67bacd5 target/arm: Implement v8M VLLDM and VLSTM

1 file Authored by Peter Maydell 5 years ago, Committed by Michael Roth 5 years ago,
    target/arm: Implement v8M VLLDM and VLSTM
    
    For v8M the instructions VLLDM and VLSTM support lazy saving
    and restoring of the secure floating-point registers. Even
    if the floating point extension is not implemented, these
    instructions must act as NOPs in Secure state, so they can
    be used as part of the secure-to-nonsecure call sequence.
    
    Fixes: https://bugs.launchpad.net/qemu/+bug/1768295
    Cc: qemu-stable@nongnu.org
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
    Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
    Message-id: 20180503105730.5958-1-peter.maydell@linaro.org
    (cherry picked from commit b1e5336a9899016c53d59eba53ebf6abcc21995c)
    Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
    
        
file modified
+16 -1