intel-iommu: Extend address width to 48 bits
    
    The current implementation of Intel IOMMU code only supports 39 bits
    iova address width. This patch provides a new parameter (x-aw-bits)
    for intel-iommu to extend its address width to 48 bits but keeping the
    default the same (39 bits). The reason for not changing the default
    is to avoid potential compatibility problems with live migration of
    intel-iommu enabled QEMU guest. The only valid values for 'x-aw-bits'
    parameter are 39 and 48.
    
    After enabling larger address width (48), we should be able to map
    larger iova addresses in the guest. For example, a QEMU guest that
    is configured with large memory ( >=1TB ). To check whether 48 bits
    aw is enabled, we can grep in the guest dmesg output with line:
    "DMAR: Host address width 48".
    
    Signed-off-by: Prasad Singamsetty <prasad.singamsety@oracle.com>
    Reviewed-by: Peter Xu <peterx@redhat.com>
    Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
    Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
    (cherry picked from commit 37f51384ae05bd50f83308339dbffa3e78404874)
    Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>