From 7868909ed53ed41a945f7ed95ebb88aa252142ce Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Jun 12 2018 17:25:24 +0000 Subject: Merge git://git.denx.de/u-boot-fsl-qoriq --- diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dde422b..22234cd 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1034,6 +1034,19 @@ config TARGET_LS1012A2G5RDB development platform that supports the QorIQ LS1012A Layerscape Architecture processor. +config TARGET_LS1012AFRWY + bool "Support ls1012afrwy" + select ARCH_LS1012A + select BOARD_LATE_INIT + select ARM64 + imply SCSI + imply SCSI_AHCI + help + Support for Freescale LS1012AFRWY platform. + The LS1012A FRWY board (FRWY) is a high-performance + development platform that supports the QorIQ LS1012A + Layerscape Architecture processor. + config TARGET_LS1012AFRDM bool "Support ls1012afrdm" select ARCH_LS1012A diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 3a0e129..22d2f29 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -91,6 +91,7 @@ config PSCI_RESET !TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \ !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ !TARGET_LS1012A2G5RDB && !TARGET_LS1012AQDS && \ + !TARGET_LS1012AFRWY && \ !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \ !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ !TARGET_LS2081ARDB && \ diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 546de33..f2111fa 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -261,40 +261,6 @@ config SYS_LS_PPA_FW_IN_NAND endchoice -config SYS_LS_PPA_FW_ADDR - hex "Address of PPA firmware loading from" - depends on FSL_LS_PPA - default 0x20400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A - default 0x40400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT - default 0x580400000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A - default 0x20400000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1088A - default 0x60400000 if SYS_LS_PPA_FW_IN_XIP - default 0x400000 if SYS_LS_PPA_FW_IN_MMC - default 0x400000 if SYS_LS_PPA_FW_IN_NAND - - help - If the PPA firmware locate at XIP flash, such as NOR or - QSPI flash, this address is a directly memory-mapped. - If it is in a serial accessed flash, such as NAND and SD - card, it is a byte offset. - -config SYS_LS_PPA_ESBC_ADDR - hex "hdr address of PPA firmware loading from" - depends on FSL_LS_PPA && CHAIN_OF_TRUST - default 0x60680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A - default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A - default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A - default 0x20680000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A - default 0x580680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A - default 0x20680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1088A - default 0x680000 if SYS_LS_PPA_FW_IN_MMC - default 0x680000 if SYS_LS_PPA_FW_IN_NAND - help - If the PPA header firmware locate at XIP flash, such as NOR or - QSPI flash, this address is a directly memory-mapped. - If it is in a serial accessed flash, such as NAND and SD - card, it is a byte offset. - config LS_PPA_ESBC_HDR_SIZE hex "Length of PPA ESBC header" depends on FSL_LS_PPA && CHAIN_OF_TRUST && !SYS_LS_PPA_FW_IN_XIP diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 3dcd6dd..078c21b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -229,7 +229,8 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1012a-qds.dtb \ fsl-ls1012a-rdb.dtb \ fsl-ls1012a-2g5rdb.dtb \ - fsl-ls1012a-frdm.dtb + fsl-ls1012a-frdm.dtb \ + fsl-ls1012a-frwy.dtb dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb diff --git a/arch/arm/dts/fsl-ls1012a-frwy.dts b/arch/arm/dts/fsl-ls1012a-frwy.dts new file mode 100644 index 0000000..a56909a --- /dev/null +++ b/arch/arm/dts/fsl-ls1012a-frwy.dts @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * NXP ls1012a FRWY board device tree source + * + * Copyright 2018 NXP + * + */ + +/dts-v1/; +#include "fsl-ls1012a.dtsi" + +/ { + model = "FRWY-LS1012A Board"; + + aliases { + spi0 = &qspi; + }; + + chosen { + stdout-path = &duart0; + }; +}; + +&qspi { + bus-num = <0>; + status = "okay"; + + qflash0: w25q16dw@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <20000000>; + reg = <0>; + }; +}; + +&i2c0 { + status = "okay"; +}; + +&duart0 { + status = "okay"; +}; diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c index 0476f24..eb5cf88 100644 --- a/board/freescale/common/vid.c +++ b/board/freescale/common/vid.c @@ -428,7 +428,7 @@ int adjust_vdd(ulong vdd_override) 0, /* reserved */ 0, /* reserved */ 0, /* reserved */ - 0, /* reserved */ + 9000, /* reserved */ 0, /* reserved */ 0, /* reserved */ 0, /* reserved */ diff --git a/board/freescale/ls1012afrdm/Kconfig b/board/freescale/ls1012afrdm/Kconfig index 22d521b..55b414e 100644 --- a/board/freescale/ls1012afrdm/Kconfig +++ b/board/freescale/ls1012afrdm/Kconfig @@ -12,16 +12,22 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012afrdm" +config SYS_LS_PFE_FW_ADDR + hex "Flash address of PFE firmware" + default 0x40a00000 + +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x40400000 +endif + if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select PHYLIB imply PHY_REALTEK - -config SYS_LS_PFE_FW_ADDR - hex "Flash address of PFE firmware" - default 0x40a00000 + imply PHY_ATHEROS config DDR_PFE_PHYS_BASEADDR hex "PFE DDR physical base address" @@ -41,6 +47,38 @@ config PFE_EMAC2_PHY_ADDR endif -source "board/freescale/common/Kconfig" +if TARGET_LS1012AFRWY + +config SYS_BOARD + default "ls1012afrdm" +config SYS_VENDOR + default "freescale" + +config SYS_SOC + default "fsl-layerscape" + +config SYS_CONFIG_NAME + default "ls1012afrwy" + +config SYS_LS_PFE_FW_ADDR + hex "Flash address of PFE firmware" + default 0x40020000 + +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x40060000 + +config SYS_LS_PPA_ESBC_ADDR + hex "PPA Firmware HDR Addr" + default 0x401f4000 + +config SYS_LS_PFE_ESBC_ADDR + hex "PFE Firmware HDR Addr" + default 0x401f8000 + +endif + +if TARGET_LS1012AFRDM || TARGET_LS1012AFRWY +source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls1012afrdm/MAINTAINERS b/board/freescale/ls1012afrdm/MAINTAINERS index 842f86f..f3fcdb8 100644 --- a/board/freescale/ls1012afrdm/MAINTAINERS +++ b/board/freescale/ls1012afrdm/MAINTAINERS @@ -4,3 +4,14 @@ S: Maintained F: board/freescale/ls1012afrdm/ F: include/configs/ls1012afrdm.h F: configs/ls1012afrdm_qspi_defconfig + +LS1012AFRWY BOARD +M: Bhaskar Upadhaya +S: Maintained +F: board/freescale/ls1012afrwy/ +F: include/configs/ls1012afrwy.h +F: configs/ls1012afrwy_qspi_defconfig + +M: Vinitha V Pillai +S: Maintained +F: configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c index f8908e0..315da8b 100644 --- a/board/freescale/ls1012afrdm/ls1012afrdm.c +++ b/board/freescale/ls1012afrdm/ls1012afrdm.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2018 NXP */ #include @@ -13,23 +13,75 @@ #endif #include #include +#include #include #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; +static inline int get_board_version(void) +{ + struct ccsr_gpio *pgpio = (void *)(GPIO1_BASE_ADDR); + int val; + + val = in_be32(&pgpio->gpdat); + + return val; +} + int checkboard(void) { +#ifdef CONFIG_TARGET_LS1012AFRDM puts("Board: LS1012AFRDM "); +#else + int rev; + + rev = get_board_version(); + + puts("Board: FRWY-LS1012A "); + + puts("Version"); + + switch (rev) { + case BOARD_REV_A: + puts(": RevA "); + break; + case BOARD_REV_B: + puts(": RevB "); + break; + default: + puts(": unknown"); + break; + } +#endif + + return 0; +} + +#ifdef CONFIG_TARGET_LS1012AFRWY +int esdhc_status_fixup(void *blob, const char *compat) +{ + char esdhc0_path[] = "/soc/esdhc@1560000"; + char esdhc1_path[] = "/soc/esdhc@1580000"; + + do_fixup_by_path(blob, esdhc0_path, "status", "okay", + sizeof("okay"), 1); + do_fixup_by_path(blob, esdhc1_path, "status", "disabled", + sizeof("disabled"), 1); return 0; } +#endif int dram_init(void) { - static const struct fsl_mmdc_info mparam = { +#ifdef CONFIG_TARGET_LS1012AFRWY + int board_rev; +#endif + struct fsl_mmdc_info mparam = { 0x04180000, /* mdctl */ 0x00030035, /* mdpdc */ 0x12554000, /* mdotc */ @@ -45,9 +97,20 @@ int dram_init(void) 0xa1390003, /* mpzqhwctrl */ }; - mmdc_init(&mparam); +#ifdef CONFIG_TARGET_LS1012AFRWY + board_rev = get_board_version(); + if (board_rev & BOARD_REV_B) { + mparam.mdctl = 0x05180000; + gd->ram_size = SYS_SDRAM_SIZE_1024; + } else { + gd->ram_size = SYS_SDRAM_SIZE_512; + } +#else gd->ram_size = CONFIG_SYS_SDRAM_SIZE; +#endif + mmdc_init(&mparam); + #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) /* This will break-before-make MMU for DDR */ update_early_mmu_table(); @@ -78,6 +141,10 @@ int board_init(void) gd->env_addr = (ulong)&default_environment[0]; #endif +#ifdef CONFIG_FSL_CAAM + sec_init(); +#endif + #ifdef CONFIG_FSL_LS_PPA ppa_init(); #endif diff --git a/board/freescale/ls1012aqds/Kconfig b/board/freescale/ls1012aqds/Kconfig index c0b12ed..b702fb2 100644 --- a/board/freescale/ls1012aqds/Kconfig +++ b/board/freescale/ls1012aqds/Kconfig @@ -12,6 +12,9 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012aqds" +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x40400000 if FSL_PFE diff --git a/board/freescale/ls1012ardb/Kconfig b/board/freescale/ls1012ardb/Kconfig index 493d477..4cd66bd 100644 --- a/board/freescale/ls1012ardb/Kconfig +++ b/board/freescale/ls1012ardb/Kconfig @@ -12,6 +12,16 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012ardb" +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x40400000 + +if CHAIN_OF_TRUST +config SYS_LS_PPA_ESBC_ADDR + hex "PPA Firmware HDR Addr" + default 0x40680000 +endif + if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy @@ -59,6 +69,10 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012a2g5rdb" +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x40400000 + if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy diff --git a/board/freescale/ls1043aqds/Kconfig b/board/freescale/ls1043aqds/Kconfig index 95d2888..182900e 100644 --- a/board/freescale/ls1043aqds/Kconfig +++ b/board/freescale/ls1043aqds/Kconfig @@ -12,6 +12,22 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1043aqds" +if FSL_LS_PPA +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x40400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT + default 0x60400000 if SYS_LS_PPA_FW_IN_XIP + default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND + +if CHAIN_OF_TRUST +config SYS_LS_PPA_ESBC_ADDR + hex "PPA Firmware HDR Addr" + default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT + default 0x60680000 if SYS_LS_PPA_FW_IN_XIP + default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND +endif +endif + source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls1043ardb/Kconfig b/board/freescale/ls1043ardb/Kconfig index 1bab7ca..3d9e295 100644 --- a/board/freescale/ls1043ardb/Kconfig +++ b/board/freescale/ls1043ardb/Kconfig @@ -22,6 +22,20 @@ config SYS_HAS_ARMV8_SECURE_BASE If enabled, please also define the value for ARMV8_SECURE_BASE, for LS1043ARDB, it could be some address in OCRAM. +if FSL_LS_PPA +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x60400000 if SYS_LS_PPA_FW_IN_XIP + default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND + +if CHAIN_OF_TRUST +config SYS_LS_PPA_ESBC_ADDR + hex "PPA Firmware HDR Addr" + default 0x60680000 if SYS_LS_PPA_FW_IN_XIP + default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND +endif +endif + source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls1046aqds/Kconfig b/board/freescale/ls1046aqds/Kconfig index 070827d..1616dcc 100644 --- a/board/freescale/ls1046aqds/Kconfig +++ b/board/freescale/ls1046aqds/Kconfig @@ -12,6 +12,22 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1046aqds" +if FSL_LS_PPA +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x40400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT + default 0x60400000 if SYS_LS_PPA_FW_IN_XIP + default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND + +if CHAIN_OF_TRUST +config SYS_LS_PPA_ESBC_ADDR + hex "PPA Firmware HDR Addr" + default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT + default 0x60680000 if SYS_LS_PPA_FW_IN_XIP + default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND +endif +endif + source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls1046ardb/Kconfig b/board/freescale/ls1046ardb/Kconfig index b9f2ed7..4c31e0e 100644 --- a/board/freescale/ls1046ardb/Kconfig +++ b/board/freescale/ls1046ardb/Kconfig @@ -12,5 +12,20 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1046ardb" + +if FSL_LS_PPA +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x40400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT + default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND + +if CHAIN_OF_TRUST +config SYS_LS_PPA_ESBC_ADDR + hex "PPA Firmware HDR Addr" + default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT + default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND +endif +endif + source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls1088a/Kconfig b/board/freescale/ls1088a/Kconfig index 4479dd0..8bb828e 100644 --- a/board/freescale/ls1088a/Kconfig +++ b/board/freescale/ls1088a/Kconfig @@ -12,6 +12,20 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1088aqds" +if FSL_LS_PPA +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x20400000 if SYS_LS_PPA_FW_IN_XIP + default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND + +if CHAIN_OF_TRUST +config SYS_LS_PPA_ESBC_ADDR + hex "PPA Firmware HDR Addr" + default 0x20680000 if SYS_LS_PPA_FW_IN_XIP + default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND +endif +endif + source "board/freescale/common/Kconfig" endif @@ -29,5 +43,19 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1088ardb" +if FSL_LS_PPA +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x20400000 if SYS_LS_PPA_FW_IN_XIP + default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND + +if CHAIN_OF_TRUST +config SYS_LS_PPA_ESBC_ADDR + hex "PPA Firmware HDR Addr" + default 0x20680000 if SYS_LS_PPA_FW_IN_XIP + default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND +endif +endif + source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls2080aqds/Kconfig b/board/freescale/ls2080aqds/Kconfig index e2b2c8d..6b2b645 100644 --- a/board/freescale/ls2080aqds/Kconfig +++ b/board/freescale/ls2080aqds/Kconfig @@ -13,6 +13,22 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls2080aqds" +if FSL_LS_PPA +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x20400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT + default 0x580400000 if SYS_LS_PPA_FW_IN_XIP + default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND + +if CHAIN_OF_TRUST +config SYS_LS_PPA_ESBC_ADDR + hex "PPA Firmware HDR Addr" + default 0x20680000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT + default 0x580680000 if SYS_LS_PPA_FW_IN_XIP + default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND +endif +endif + source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls2080ardb/Kconfig b/board/freescale/ls2080ardb/Kconfig index 8f64642..678d582 100644 --- a/board/freescale/ls2080ardb/Kconfig +++ b/board/freescale/ls2080ardb/Kconfig @@ -1,5 +1,4 @@ - -if TARGET_LS2080ARDB +if TARGET_LS2080ARDB || TARGET_LS2081ARDB config SYS_BOARD default "ls2080ardb" @@ -15,21 +14,21 @@ config SYS_CONFIG_NAME source "board/freescale/common/Kconfig" +if FSL_LS_PPA +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x20400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT + default 0x580400000 if SYS_LS_PPA_FW_IN_XIP + default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND + +if CHAIN_OF_TRUST +config SYS_LS_PPA_ESBC_ADDR + hex "PPA Firmware HDR Addr" + default 0x20680000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT + default 0x580680000 if SYS_LS_PPA_FW_IN_XIP + default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND +endif endif - -if TARGET_LS2081ARDB - -config SYS_BOARD - default "ls2080ardb" - -config SYS_VENDOR - default "freescale" - -config SYS_SOC - default "fsl-layerscape" - -config SYS_CONFIG_NAME - default "ls2080ardb" source "board/freescale/common/Kconfig" diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig new file mode 100644 index 0000000..bfc120a --- /dev/null +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -0,0 +1,54 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1012AFRWY=y +CONFIG_SECURE_BOOT=y +CONFIG_SYS_TEXT_BASE=0x40100000 +CONFIG_FSL_LS_PPA=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" +CONFIG_DISTRO_DEFAULTS=y +# CONFIG_SYS_MALLOC_F is not set +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" +CONFIG_QSPI_BOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +# CONFIG_BLK is not set +CONFIG_DM_MMC=y +# CONFIG_DM_MMC_OPS is not set +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_DM_ETH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_FSL_PFE=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y +CONFIG_FSL_DSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y +CONFIG_RSA=y +CONFIG_RSA_SOFTWARE_EXP=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig new file mode 100644 index 0000000..03ff477 --- /dev/null +++ b/configs/ls1012afrwy_qspi_defconfig @@ -0,0 +1,50 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1012AFRWY=y +CONFIG_SYS_TEXT_BASE=0x40100000 +CONFIG_FSL_LS_PPA=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" +CONFIG_DISTRO_DEFAULTS=y +# CONFIG_SYS_MALLOC_F is not set +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" +CONFIG_QSPI_BOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +# CONFIG_BLK is not set +CONFIG_DM_MMC=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_FSL_PFE=y +CONFIG_DM_ETH=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y +CONFIG_FSL_DSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 17791b0..e4f0068 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y +CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_NET_RANDOM_ETHADDR=y @@ -49,5 +50,11 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_STORAGE=y CONFIG_RSA=y CONFIG_SPL_RSA=y diff --git a/drivers/net/pfe_eth/pfe_firmware.c b/drivers/net/pfe_eth/pfe_firmware.c index f06ed37..adb2d06 100644 --- a/drivers/net/pfe_eth/pfe_firmware.c +++ b/drivers/net/pfe_eth/pfe_firmware.c @@ -12,6 +12,9 @@ #include #include +#ifdef CONFIG_CHAIN_OF_TRUST +#include +#endif #define PFE_FIRMEWARE_FIT_CNF_NAME "config@1" @@ -168,10 +171,15 @@ static int pfe_fit_check(void) */ int pfe_firmware_init(void) { +#define PFE_KEY_HASH NULL char *pfe_firmware_name; const void *raw_image_addr; size_t raw_image_size = 0; u8 *pfe_firmware; +#ifdef CONFIG_CHAIN_OF_TRUST + uintptr_t pfe_esbc_hdr = 0; + uintptr_t pfe_img_addr = 0; +#endif int ret = 0; int fw_count; @@ -179,6 +187,27 @@ int pfe_firmware_init(void) if (ret) goto err; +#ifdef CONFIG_CHAIN_OF_TRUST + pfe_esbc_hdr = CONFIG_SYS_LS_PFE_ESBC_ADDR; + pfe_img_addr = (uintptr_t)pfe_fit_addr; + if (fsl_check_boot_mode_secure() != 0) { + /* + * In case of failure in validation, fsl_secboot_validate + * would not return back in case of Production environment + * with ITS=1. In Development environment (ITS=0 and + * SB_EN=1), the function may return back in case of + * non-fatal failures. + */ + ret = fsl_secboot_validate(pfe_esbc_hdr, + PFE_KEY_HASH, + &pfe_img_addr); + if (ret != 0) + printf("PFE firmware(s) validation failed\n"); + else + printf("PFE firmware(s) validation Successful\n"); + } +#endif + for (fw_count = 0; fw_count < 2; fw_count++) { if (fw_count == 0) pfe_firmware_name = "class"; diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h new file mode 100644 index 0000000..35578c3 --- /dev/null +++ b/include/configs/ls1012afrwy.h @@ -0,0 +1,133 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + */ + +#ifndef __LS1012AFRWY_H__ +#define __LS1012AFRWY_H__ + +#include "ls1012a_common.h" + +/* Board Rev*/ +#define BOARD_REV_A 0x0 +#define BOARD_REV_B 0x200 + +/* DDR */ +#define CONFIG_DIMM_SLOTS_PER_CTLR 1 +#define CONFIG_CHIP_SELECTS_PER_CTRL 1 +#define CONFIG_NR_DRAM_BANKS 2 +#define SYS_SDRAM_SIZE_512 0x20000000 +#define SYS_SDRAM_SIZE_1024 0x40000000 +#define CONFIG_CHIP_SELECTS_PER_CTRL 1 +#define CONFIG_CMD_MEMINFO +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END 0x9fffffff + +#ifndef CONFIG_SPL_BUILD +#undef BOOT_TARGET_DEVICES +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) +#endif + +#undef CONFIG_ENV_OFFSET +#define CONFIG_ENV_OFFSET 0x1D0000 +#undef FSL_QSPI_FLASH_SIZE +#define FSL_QSPI_FLASH_SIZE SZ_16M +#undef CONFIG_ENV_SECT_SIZE +#define CONFIG_ENV_SECT_SIZE 0x10000 /*64 KB*/ +#undef CONFIG_ENV_SIZE +#define CONFIG_ENV_SIZE 0x10000 /*64 KB*/ + +/* MMC */ +#ifdef CONFIG_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 +#endif + +#define CONFIG_PCIE1 /* PCIE controller 1 */ + +#define CONFIG_PCI_SCAN_SHOW + +#undef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + "verify=no\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "fdt_addr=0x00f00000\0" \ + "kernel_addr=0x01000000\0" \ + "kernel_size_sd=0x16000\0" \ + "kernelhdr_size_sd=0x10\0" \ + "kernel_addr_sd=0x8000\0" \ + "kernelhdr_addr_sd=0x4000\0" \ + "kernelheader_addr=0x1fc000\0" \ + "kernelheader_addr=0x1fc000\0" \ + "scriptaddr=0x80000000\0" \ + "scripthdraddr=0x80080000\0" \ + "fdtheader_addr_r=0x80100000\0" \ + "kernelheader_addr_r=0x80200000\0" \ + "kernelheader_size=0x40000\0" \ + "kernel_addr_r=0x81000000\0" \ + "fdt_addr_r=0x90000000\0" \ + "load_addr=0x96000000\0" \ + "kernel_size=0x2800000\0" \ + "kernelheader_size=0x40000\0" \ + "console=ttyS0,115200\0" \ + BOOTENV \ + "boot_scripts=ls1012afrwy_boot.scr\0" \ + "boot_script_hdr=hdr_ls1012afrwy_bs.out\0" \ + "scan_dev_for_boot_part=" \ + "part list ${devtype} ${devnum} devplist; " \ + "env exists devplist || setenv devplist 1; " \ + "for distro_bootpart in ${devplist}; do " \ + "if fstype ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "bootfstype; then " \ + "run scan_dev_for_boot; " \ + "fi; " \ + "done\0" \ + "scan_dev_for_boot=" \ + "echo Scanning ${devtype} " \ + "${devnum}:${distro_bootpart}...; " \ + "for prefix in ${boot_prefixes}; do " \ + "run scan_dev_for_scripts; " \ + "done;" \ + "\0" \ + "boot_a_script=" \ + "load ${devtype} ${devnum}:${distro_bootpart} " \ + "${scriptaddr} ${prefix}${script}; " \ + "env exists secureboot && load ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "${scripthdraddr} ${prefix}${boot_script_hdr} " \ + "&& esbc_validate ${scripthdraddr};" \ + "source ${scriptaddr}\0" \ + "installer=load mmc 0:2 $load_addr " \ + "/flex_installer_arm64.itb; " \ + "bootm $load_addr#$board\0" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ + "sf probe && sf read $load_addr " \ + "$kernel_addr $kernel_size; env exists secureboot " \ + "&& sf read $kernelheader_addr_r $kernelheader_addr " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ + "bootm $load_addr#$board\0" \ + "sd_bootcmd=echo Trying load from sd card..;" \ + "mmcinfo; mmc read $load_addr " \ + "$kernel_addr_sd $kernel_size_sd ;" \ + "env exists secureboot && mmc read $kernelheader_addr_r "\ + "$kernelhdr_addr_sd $kernelhdr_size_sd " \ + " && esbc_validate ${kernelheader_addr_r};" \ + "bootm $load_addr#$board\0" + +#undef CONFIG_BOOTCOMMAND +#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run sd_bootcmd; "\ + "env exists secureboot && esbc_halt;" +#define CONFIG_CMD_MEMINFO +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END 0x9fffffff + +#include + +#include +#endif /* __LS1012AFRWY_H__ */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 0b4a6a4..79a84c4 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -351,6 +351,15 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CONFIG_SYS_I2C_EEPROM_NXID +#define CONFIG_SYS_EEPROM_BUS_NUM 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 + /* * I2C bus multiplexer */