OvmfPkg: add PciHotPlugInitDxe
    
    After IncompatiblePciDeviceSupportDxe, this is another small driver /
    protocol implementation that tweaks the behavior of the PCI bus driver in
    edk2.
    
    The protocol is specified in the Platform Init Spec v1.4a, Volume 5,
    Chapter 12.6 "PCI Hot Plug PCI Initialization Protocol". This
    implementation steers the PCI bus driver to reserve the following
    resources ("padding") for each PCI bus, in addition to the BARs of the
    devices on that PCI bus:
    - 2MB of 64-bit non-prefetchable MMIO aperture,
    - 512B of IO port space.
    
    The goal is to reserve room for devices hot-plugged at runtime even if the
    bridge receiving the device is empty at boot time.
    
    The 2MB MMIO size is inspired by SeaBIOS. The 512B IO port size is
    actually only 1/8th of the PCI spec mandated reservation, but the
    specified size of 4096 has proved wasteful (given the limited size of our
    IO port space -- see commit bba734ab4c7c). Especially on Q35, where every
    PCIe root port and downstream port qualifies as a separate bridge (capable
    of accepting a single device).
    
    Test results for this patch:
    - regardless of our request for 64-bit MMIO reservation, it is downgraded
      to 32-bit,
    - although we request 512B alignment for the IO port space reservation,
      the next upstream bridge rounds it up to 4096B.
    
    Cc: "Johnson, Brian J." <bjohnson@sgi.com>
    Cc: Alex Williamson <alex.williamson@redhat.com>
    Cc: Andrew Fish <afish@apple.com>
    Cc: Feng Tian <feng.tian@intel.com>
    Cc: Jordan Justen <jordan.l.justen@intel.com>
    Cc: Marcel Apfelbaum <marcel@redhat.com>
    Cc: Ruiyu Ni <ruiyu.ni@intel.com>
    Cc: Star Zeng <star.zeng@intel.com>
    Suggested-by: Andrew Fish <afish@apple.com>
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Laszlo Ersek <lersek@redhat.com>