UefiCpuPkg/PiSmmCpuDxeSmm: remove DBs from SmmRelocationSemaphoreComplete32()
    
    (1) SmmRelocationSemaphoreComplete32() runs in 32-bit mode, so wrap it in
        a (BITS 32 ... BITS 64) bracket.
    
    (2) SmmRelocationSemaphoreComplete32() currently compiles to:
    
    > 000002AE  C6050000000001    mov byte [dword 0x0],0x1
    > 000002B5  FF2500000000      jmp dword [dword 0x0]
    
        where the first instruction is patched with the contents of
        "mRebasedFlag" (so that (*mRebasedFlag) is set to 1), and the second
        instruction is patched with the address of
        "mSmmRelocationOriginalAddress" (so that we jump to
        "mSmmRelocationOriginalAddress").
    
        In its current form the first instruction could not be patched with
        PatchInstructionX86(), given that the operand to patch is not encoded
        in the trailing bytes of the instruction. Therefore, adopt an
        EAX-based version, inspired by both the IA32 and X64 variants of
        SmmRelocationSemaphoreComplete():
    
    > 000002AE  50                push eax
    > 000002AF  B800000000        mov eax,0x0
    > 000002B4  C60001            mov byte [eax],0x1
    > 000002B7  58                pop eax
    > 000002B8  FF2500000000      jmp dword [dword 0x0]
    
        Here both instructions can be patched with PatchInstructionX86(), and
        the DBs can be replaced with native NASM syntax.
    
    (3) Turn the "mRebasedFlagAddr32" and "mSmmRelocationOriginalAddressPtr32"
        variables into markers that suit PatchInstructionX86().
    
    This removes the last instructions encoded with DBs from PiSmmCpuDxeSmm.
    
    Cc: Eric Dong <eric.dong@intel.com>
    Cc: Jiewen Yao <jiewen.yao@intel.com>
    Cc: Liming Gao <liming.gao@intel.com>
    Cc: Michael D Kinney <michael.d.kinney@intel.com>
    Cc: Ruiyu Ni <ruiyu.ni@intel.com>
    Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=866
    Contributed-under: TianoCore Contribution Agreement 1.1
    Signed-off-by: Laszlo Ersek <lersek@redhat.com>