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96d63c5
litex integration iteration - only wb_port not working
Authored and Committed by Marwan Abbas
2 years ago
raw
patch
tree
parent
13 files changed.
37 lines added
.
412 lines removed
.
verilog/dv/Makefile
file modified
+3
-4
verilog/dv/io_ports/RTL-io_ports.vcd
file removed
-0
verilog/dv/io_ports/io_ports.hex
file removed
-59
verilog/dv/io_ports/io_ports.hexe
file removed
-59
verilog/dv/io_ports/io_ports.lst
file removed
-271
verilog/dv/io_ports/io_ports_tb.v
file modified
+1
-1
verilog/dv/la_test1/Makefile
file modified
+7
-1
verilog/dv/la_test2/Makefile
file modified
+7
-1
verilog/dv/la_test2/la_test2_tb.v
file modified
+1
-1
verilog/dv/mprj_stimulus/Makefile
file modified
+7
-1
verilog/dv/mprj_stimulus/mprj_stimulus_tb.v
file modified
+3
-12
verilog/dv/wb_port/Makefile
file modified
+7
-1
litex integration iteration - only wb_port not working
verilog/dv/Makefile
file modified
+3
-4
verilog/dv/io_ports/RTL-io_ports.vcd
file removed
-0
verilog/dv/io_ports/io_ports.hex
file removed
-59
verilog/dv/io_ports/io_ports.hexe
file removed
-59
verilog/dv/io_ports/io_ports.lst
file removed
-271
verilog/dv/io_ports/io_ports_tb.v
file modified
+1
-1
verilog/dv/la_test1/Makefile
file modified
+7
-1
verilog/dv/la_test2/Makefile
file modified
+7
-1
verilog/dv/la_test2/la_test2_tb.v
file modified
+1
-1
verilog/dv/mprj_stimulus/Makefile
file modified
+7
-1
verilog/dv/mprj_stimulus/mprj_stimulus_tb.v
file modified
+3
-12
verilog/dv/wb_port/Makefile
file modified
+7
-1