This commit was manufactured by cvs2svn to create branch 'msnyder-
    reverse-20060502-branch'.
    
    Sprout from readline_5_1-import-branch 2006-04-20 20:13:22 UTC nobody 'This commit was manufactured by cvs2svn to create branch 'readline_5_1'
    Cherrypick from master 2006-05-01 19:36:27 UTC DJ Delorie <dj@redhat.com> '* bfd-in.h (bfd_hash_table): Add count field.':
        bfd/ChangeLog
        bfd/bfd-in.h
        bfd/bfd-in2.h
        bfd/coff-rs6000.c
        bfd/elf.c
        bfd/elf32-arm.c
        bfd/elfxx-target.h
        bfd/hash.c
        bfd/libbfd-in.h
        bfd/libbfd.h
        bfd/opncls.c
        bfd/tekhex.c
        bfd/version.h
        gdb/ChangeLog
        gdb/MAINTAINERS
        gdb/Makefile.in
        gdb/NEWS
        gdb/breakpoint.c
        gdb/config/m32c/m32c.mt
        gdb/configure.tgt
        gdb/doc/ChangeLog
        gdb/doc/gdb.texinfo
        gdb/doc/gdbint.texinfo
        gdb/dwarf2read.c
        gdb/linux-fork.c
        gdb/m32c-tdep.c
        gdb/mingw-hdep.c
        gdb/mips-mdebug-tdep.c
        gdb/ppcnbsd-tdep.c
        gdb/remote.c
        gdb/rs6000-tdep.c
        gdb/ser-mingw.c
        gdb/serial.c
        gdb/serial.h
        gdb/testsuite/ChangeLog
        gdb/testsuite/gdb.asm/asm-source.exp
        gdb/testsuite/gdb.asm/m32c.inc
        gdb/testsuite/gdb.base/multi-forks.exp
        gdb/testsuite/gdb.base/sigbpt.exp
        gdb/testsuite/gdb.base/siginfo.exp
        gdb/testsuite/gdb.base/sigstep.exp
        gdb/version.in
        include/ChangeLog
        include/opcode/ChangeLog
        include/opcode/arm.h
        include/opcode/mips.h
        libiberty/ChangeLog
        libiberty/floatformat.c
        opcodes/ChangeLog
        opcodes/arm-dis.c
        opcodes/m68k-dis.c
        opcodes/mips-dis.c
        opcodes/mips-opc.c
        sim/ppc/ChangeLog
        sim/ppc/Makefile.in
    Delete:
        readline/examples/rlfe/ChangeLog
        readline/examples/rlfe/Makefile.in
        readline/examples/rlfe/README
        readline/examples/rlfe/config.h.in
        readline/examples/rlfe/configure
        readline/examples/rlfe/configure.in
        readline/examples/rlfe/extern.h
        readline/examples/rlfe/os.h
        readline/examples/rlfe/pty.c
        readline/examples/rlfe/rlfe.c
        readline/examples/rlfe/screen.h
        sim/testsuite/sim/cris/hw/rv-n-cris/host1.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/irq1.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/irq2.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/irq3.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/irq4.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/irq5.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/irq6.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/mbox1.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/mem1.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/mem2.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/poll1.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/quit.s
        sim/testsuite/sim/cris/hw/rv-n-cris/rvc.exp
        sim/testsuite/sim/cris/hw/rv-n-cris/std.dev
        sim/testsuite/sim/cris/hw/rv-n-cris/testutils.inc
        sim/testsuite/sim/cris/hw/rv-n-cris/trivial1.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/trivial2.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/trivial3.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/trivial4.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/trivial4.r
        sim/testsuite/sim/cris/hw/rv-n-cris/trivial5.ms
        sim/testsuite/sim/cris/hw/rv-n-cris/wd1.ms