[AArch64][SVE 28/32] Add SVE FP immediate operands
    
    This patch adds support for the new SVE floating-point immediate
    operands.  One operand uses the same 8-bit encoding as base AArch64,
    but in a different position.  The others use a single bit to select
    between two values.
    
    One of the single-bit operands is a choice between 0 and 1, where 0
    is not a valid 8-bit encoding.  I think the cleanest way of handling
    these single-bit immediates is therefore to use the IEEE float encoding
    itself as the immediate value and select between the two possible values
    when encoding and decoding.
    
    As described in the covering note for the patch that added F_STRICT,
    we get better error messages by accepting unsuffixed vector registers
    and leaving the qualifier matching code to report an error.  This means
    that we carry on parsing the other operands, and so can try to parse FP
    immediates for invalid instructions like:
    
    	fcpy	z0, #2.5
    
    In this case there is no suffix to tell us whether the immediate should
    be treated as single or double precision.  Again, we get better error
    messages by picking one (arbitrary) immediate size and reporting an error
    for the missing suffix later.
    
    include/
    	* opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
    	(AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
    	(AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
    
    opcodes/
    	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for the new SVE FP
    	immediate operands.
    	* aarch64-opc.h (FLD_SVE_i1): New aarch64_field_kind.
    	* aarch64-opc.c (fields): Add corresponding entry.
    	(operand_general_constraint_met_p): Handle the new SVE FP immediate
    	operands.
    	(aarch64_print_operand): Likewise.
    	* aarch64-opc-2.c: Regenerate.
    	* aarch64-asm.h (ins_sve_float_half_one, ins_sve_float_half_two)
    	(ins_sve_float_zero_one): New inserters.
    	* aarch64-asm.c (aarch64_ins_sve_float_half_one): New function.
    	(aarch64_ins_sve_float_half_two): Likewise.
    	(aarch64_ins_sve_float_zero_one): Likewise.
    	* aarch64-asm-2.c: Regenerate.
    	* aarch64-dis.h (ext_sve_float_half_one, ext_sve_float_half_two)
    	(ext_sve_float_zero_one): New extractors.
    	* aarch64-dis.c (aarch64_ext_sve_float_half_one): New function.
    	(aarch64_ext_sve_float_half_two): Likewise.
    	(aarch64_ext_sve_float_zero_one): Likewise.
    	* aarch64-dis-2.c: Regenerate.
    
    gas/
    	* config/tc-aarch64.c (double_precision_operand_p): New function.
    	(parse_operands): Use it to calculate the dp_p input to
    	parse_aarch64_imm_float.  Handle the new SVE FP immediate operands.